HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 290

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Table 10.42 MTU Interrupts
Channel
0
1
2
3
4
Note: This table shows the initial state immediately after a reset. The relative channel priorities
Input Capture/Compare Match Interrupt: An interrupt is requested if the TGIE bit in TIER is
set to 1 when the TGF flag in TSR is set to 1 by the occurrence of a TGR input capture/compare
match on a particular channel. The interrupt request is cleared by clearing the TGF flag to 0. The
MTU has 16 input capture/compare match interrupts, four each for channels 0, 3, and 4, and two
each for channels 1 and 2.
Rev. 2.00, 09/04, page 248 of 720
can be changed by the interrupt controller.
Name
TGI0A
TGI0B
TGI0C
TGI0D
TCI0V
TGI1A
TGI1B
TCI1V
TCI1U
TGI2A
TGI2B
TCI2V
TCI2U
TGI3A
TGI3B
TGI3C
TGI3D
TCI3V
TGI4A
TGI4B
TGI4C
TGI4D
TCI4V
Interrupt Source
TGRA_0 input capture/compare match
TGRB_0 input capture/compare match
TGRC_0 input capture/compare match
TGRD_0 input capture/compare match
TCNT_0 overflow
TGRA_1 input capture/compare match
TGRB_1 input capture/compare match
TCNT_1 overflow
TCNT_1 underflow
TGRA_2 input capture/compare match
TGRB_2 input capture/compare match
TCNT_2 overflow
TCNT_2 underflow
TGRA_3 input capture/compare match
TGRB_3 input capture/compare match
TGRC_3 input capture/compare match
TGRD_3 input capture/compare match
TCNT_3 overflow
TGRA_4 input capture/compare match
TGRB_4 input capture/compare match
TGRC_4 input capture/compare match
TGRD_4 input capture/compare match
TCNT_4 overflow/underflow
Interrupt
Flag
TGFA_0
TGFB_0
TGFC_0
TGFD_0
TCFV_0
TGFA_1
TGFB_1
TCFV_1
TCFU_1
TGFA_2
TGFB_2
TCFV_2
TCFU_2
TGFA_3
TGFB_3
TGFC_3
TGFD_3
TCFV_3
TGFA_4
TGFB_4
TGFC_4
TGFD_4
TCFV_4
DTC
Activation
Possible
Possible
Possible
Possible
Not possible
Possible
Possible
Not possible
Not possible
Possible
Possible
Not possible
Not possible
Possible
Possible
Possible
Possible
Not possible
Possible
Possible
Possible
Possible
Possible
Priority
High
Low

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