HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 553

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note:
Bit
7, 6
5
4
3
2
1
0
*
Bit Name
—
POE6M1
POE6M0
POE5M1
POE5M0
POE4M1
POE4M0
Only 0 can be written to clear the flag.
Initial
Value
All 0
0
0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0 and should only be
written with 0.
POE6 Mode 1 and 0
These bits select the input mode of the POE6 pin.
00: Request accepted at falling edge of POE6 input
01: POE6 input is sampled for low level 16 times every
10: POE6 input is sampled for low level 16 times every
11: POE6 input is sampled for low level 16 times every
POE5 Mode 1 and 0
These bits select the input mode of the POE5 pin.
00: Request accepted at falling edge of POE5 input
01: POE5 input is sampled for low level 16 times every
10: POE5 input is sampled for low level 16 times every
11: POE5 input is sampled for low level 16 times every
POE4 Mode 1 and 0
These bits select the input mode of the POE4 pin.
00: Request accepted at falling edge of POE4 input
01: POE4 input is sampled for low level 16 times every
10: POE4 input is sampled for low level 16 times every
11: POE4 input is sampled for low level 16 times every
Pφ/8 clock, and request is accepted when all samples
are low level
Pφ/16 clock, and request is accepted when all
samples are low level
Pφ/128 clock, and request is accepted when all
samples are low level
Pφ/8 clock, and request is accepted when all samples
are low level
Pφ/16 clock, and request is accepted when all
samples are low level
Pφ/128 clock, and request is accepted when all
samples are low level
Pφ/8 clock, and request is accepted when all samples
are low level
Pφ/16 clock, and request is accepted when all
samples are low level
Pφ/128 clock, and request is accepted when all
samples are low level
Rev. 2.00, 09/04, page 511 of 720