HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 186

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

9.6.3
Idle cycles can be inserted to prevent extension of the RD or WRL signal assert period beyond the
length of the CS0 signal assert period by setting the SW0 bit of BCR2. This allows for flexible
interfaces with external circuitry. The timing is shown in figure 9.6. T
respectively before and after the normal cycle. Only CS0 is asserted in these cycles; RD and WRL
signals are not. Further, data is extended up to the T
the like, which have slower write operations.
Rev. 2.00, 09/04, page 144 of 720
CS Assert Period Extension
Read
Write
Address
Figure 9.6 CS Assert Period Extension Function
WRL
Data
Data
CS0
CK
RD
Th
T1
f
cycle, which is effective for gate arrays and
T2
Tf
h
and T
f
cycles are added