HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 408

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
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Part Number:
HD64F7047FW40V
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Rev. 2.00, 09/04, page 366 of 720
No
No
No
Figure 12.13 Sample Multiprocessor Serial Reception Flowchart (1)
Read ORER and FER flags
Read ORER and FER flags
Read receive data in RDR
Read receive data in RDR
Set MPIE bit in SCR to 1
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Read RDRF flag in SSR
All data received?
This station’s ID?
FER∨ORER = 1
FER∨ORER = 1
Start reception
Initialization
RDRF = 1
RDRF = 1
in SSR
in SSR
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Error processing
Yes
(Continued on
[3]
[1]
[2]
next page)
[4]
[5]
[1] SCI initialization:
[2] ID reception cycle:
[3] SCI status check, ID reception and
[4] SCI status check and data reception:
[5] Receive error processing and break
Set the RxD pin using the PFC.
Set the MPIE bit in SCR to 1.
comparison:
Read SSR and check that the RDRF
flag is set to 1, then read the receive
data in RDR and compare it with this
station’s ID.
If the data is not this station’s ID, set the
MPIE bit to 1 again, and clear the RDRF
flag to 0.
If the data is this station’s ID, clear the
RDRF flag to 0.
Read SSR and check that the RDRF
flag is set to 1, then read the data in
RDR.
detection:
If a receive error occurs, read the ORER
and FER flags in SSR to identify the
error. After performing the appropriate
error processing, ensure that the ORER
and FER flags are all cleared to 0.
Reception cannot be resumed if either
of these flags is set to 1.
In the case of a framing error, a break
can be detected by reading the RxD pin
value.

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