HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 217

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7047FW40V
0
Table 10.21 TIORL_3 (channel 3)
[Legend]
X: Don’t care
Notes: 1. The low level output is retained until TIOR contents is specified after a power-on reset.
Bit 3
IOC3
0
1
2. When the BFA bit in TMDR_3 is set to 1 and TGRC_3 is used as a buffer register, this
Bit 2
IOC2
0
1
X
setting is invalid and input capture/output compare is not generated.
Bit 1
IOC1
0
1
0
1
0
1
Bit 0
IOC0
0
1
0
1
0
1
0
1
0
1
X
TGRC_3
Function
Output
compare
register
Input
capture
register*
2
TIOC3C Pin Function
Output hold*
Initial output is 0
0 output at compare match
Initial output is 0
1 output at compare match
Initial output is 0
Toggle output at compare match
Output hold
Initial output is 1
0 output at compare match
Initial output is 1
1 output at compare match
Initial output is 1
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Description
1
Rev. 2.00, 09/04, page 175 of 720

Related parts for HD64F7047FW40V