HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 229

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.3.9
TSYR is an 8-bit readable/writable register that selects independent operation or synchronous
operation for the channel 0 to 4 TCNT counters. A channel performs synchronous operation when
the corresponding bit in TSYR is set to 1.
Bit
7
6
5 to 3 
2
1
0
Bit Name
SYNC4
SYNC3
SYNC2
SYNC1
SYNC0
Timer Synchro Register (TSYR)
Initial
value
0
0
All 0
0
0
0
R/W
R/W
R/W
R
R/W
R/W
R/W
Description
Timer Synchro 4 and 3
These bits are used to select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, the TCNT
synchronous presetting of multiple channels, and
synchronous clearing by counter clearing on another
channel, are possible.
To set synchronous operation, the SYNC bits for at least
two channels must be set to 1. To set synchronous clearing,
in addition to the SYNC bit, the TCNT clearing source must
also be set by means of bits CCLR0 to CCLR2 in TCR.
0: TCNT_4 and TCNT_3 operate independently (TCNT
1: TCNT_4 and TCNT_3 performs synchronous operation
TCNT synchronous presetting/synchronous clearing is
possible
Reserved
These bits are always read as 0. Only 0 should be written to
these bits.
Timer Synchro 2 to 0
These bits are used to select whether operation is
independent of or synchronized with other channels.
When synchronous operation is selected, the TCNT
synchronous presetting of multiple channels, and
synchronous clearing by counter clearing on another
channel, are possible.
To set synchronous operation, the SYNC bits for at least
two channels must be set to 1. To set synchronous clearing,
in addition to the SYNC bit, the TCNT clearing source must
also be set by means of bits CCLR0 to CCLR2 in TCR.
0: TCNT_2 to TCNT_0 operates independently (TCNT
1: TCNT_2 to TCNT_0 performs synchronous operation
TCNT synchronous presetting/synchronous clearing is
possible
presetting/clearing is unrelated to other channels)
presetting /clearing is unrelated to other channels)
Rev. 2.00, 09/04, page 187 of 720