HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 367

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.4.5
When TCNT overflows in watchdog timer mode, the WOVF bit of RSTCSR is set to 1 and a
WDTOVF signal is output. When the RSTE bit in RSTCSR is set to 1, TCNT overflow enables an
internal reset signal to be generated for the entire chip. Figure 11.5 shows this timing.
11.5
During interval timer mode operation, an overflow generates an interval timer interrupt (ITI). The
interval timer interrupt is requested whenever the OVF flag is set to 1 in TCSR. OVF must be
cleared to 0 in the interrupt handling routine.
Table 11.2 WDT Interrupt Source (in Interval Timer Mode)
11.6
11.6.1
The watchdog timer’s TCNT, TCSR, and RSTCSR registers differ from other registers in being
more difficult to write to. The procedures for writing to and reading these registers are given
below.
Writing to TCNT and TCSR: These registers must be written by a word transfer instruction.
They cannot be written by byte transfer instructions.
Name
ITI
Timing of Setting the Watchdog Timer Overflow Flag (WOVF)
Interrupts
Notes on Register Access
Usage Notes
φ
Overflow signal
(internal signal)
WOVF
TCNT
TCNT overflow
Interrupt Source
Figure 11.5 Timing of Setting WOVF
H'FF
H'00
Interrupt Flag
OVF
Rev. 2.00, 09/04, page 325 of 720
DTC Activation
Impossible