HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 236

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4
10.4.1
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
Each TGR can be used as an input capture register or output compare register.
Always set the MTU external pins function using the pin function controller (PFC).
Counter Operation: When one of bits CST0 to CST4 is set to 1 in TSTR, the TCNT counter for
the corresponding channel begins counting. TCNT can operate as a free-running counter, periodic
counter, for example.
1. Example of Count Operation Setting Procedure
Rev. 2.00, 09/04, page 194 of 720
Figure 10.3 shows an example of the count operation setting procedure.
Select counter clearing
Select output compare
Start count operation
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Operation
Basic Functions
free-running operation, synchronous counting, and external event counting.
Set period
register
source
Figure 10.3 Example of Counter Operation Setting Procedure
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
[5]
[1] Select the counter clock
[2] For periodic counter
[3] Designate the TGR
[4] Set the periodic counter
[5] Set the CST bit in TSTR to
with bits TPSC2 to TPSC0
in TCR. At the same time,
select the input clock edge
with bits CKEG1 and
CKEG0 in TCR.
operation, select the TGR
to be used as the TCNT
clearing source with bits
CCLR2 to CCLR0 in TCR.
selected in [2] as an output
compare register by means
of TIOR.
cycle in the TGR selected
in [2].
1 to start the counter
operation.