HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 67

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Addressing
Mode
Indirect PC
addressing with
displacement
PC relative
addressing
Instruction
Format
@(disp:8,
PC)
disp:8
disp:12
Effective Address Calculation
The effective address is the sum of PC value and
an 8-bit displacement (disp). The value of disp is
zero-extended, and is doubled for a word operation,
and quadrupled for a longword operation. For a
longword operation, the lowest two bits of the PC
value are masked.
The effective address is the sum of PC value and
the value that is obtained by doubling the sign-
extended 8-bit displacement (disp).
The effective address is the sum of PC value and
the value that is obtained by doubling the sign-
extended 12-bit displacement (disp).
(zero-extended)
(sign-extended)
(sign-extended)
H'FFFFFFFC
disp
disp
disp
PC
2/4
PC
PC
2
2
&
×
×
×
(for longword)
+
+
+
PC & H'FFFFFFFC
PC + disp × 2
PC + disp × 2
PC + disp × 2
Rev. 2.00, 09/04, page 25 of 720
+ disp × 4
or
Equation
Word:
PC + disp × 2
Longword:
PC &
H'FFFFFFFC
+ disp × 4
PC + disp × 2
PC + disp × 2

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