HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 475

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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HD64F7047FW40V
0
• TXCR0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
TXCR15
TXCR14
TXCR13
TXCR12
TXCR11
TXCR10
TXCR9
TXCR8
TXCR7
TXCR6
TXCR5
TXCR4
TXCR3
TXCR2
TXCR1
Initial Value R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Cancel the transmit wait message in the
corresponding mailboxes from 1 to 15. When TXCRn
(n = 1 to 15) is set to 1, the transmit wait message in
mailbox n is canceled.
[Clearing condition]
Bit 0 is reserved. This bit is always read as 0. The
write value should always be 0.
To clear the corresponding bit in TXPR, 1 must be
written to the corresponding bit TXCR. When
cancellation has succeeded, the HCAN2 clears the
corresponding TXPR/TXCR bits, and sets the
corresponding ABACK bit. However, once a mailbox
has started transmission, it cannot be canceled by
this bit.
Note: 1 can be written only when the mailbox is
Completion of TXPR clearing (when transmit
message is canceled normally), or normal end
process is carried out (when transmit message is
being transmitted, thereby unable to be canceled)
configured as a transmit mailbox.
Rev. 2.00, 09/04, page 433 of 720

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