HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 748

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Rev. 2.00, 09/04, page 706 of 720
Item
Figure 10.34
Complementary PWM
Mode Counter Operation
Figure 10.73 Contention
between TGR Write and
Compare Match
Figure 10.83 Contention
between Overflow and
Counter Clearing
Figure 10.84 Contention
between TCNT Write and
Overflow
10.9.5 Usage Notes
Page
227
261
271
272
315
Revisions (See Manual for Details)
1. To set the POE pin as a level-detective pin, a high level
2. To clear bits POE0F, POE1F, POE2F, POE3F, and OSF to
signal must be firstly input to the POE pin.
0, read registers ICSR1 and OCSR. Clear bits, which are
read as 1, to 0, and write 1 to the other bits in the registers.
Address
Write signal
Compare
match signal
TCFV flag
Counter value
TCNT input
clock
Counter clear
signal
TGF
TCFV
TGRA_3
H'0000
TCDR
TDDR
TCNT_4
Disabled
TGR write cycle
TGR address
T1
TCNT write cycle
T1
TCNTS
T2
TCNT_3
T2

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