HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 643

• Manufacturer Part Number: HD64F7047FW40V
• Description: MCU 5V 256K I-TEMP,PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047FW40V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

23.5
23.5.1
The debugger's internal buffers and processing states are initialized in the following cases:
1. In a power-on reset
2. In hardware standby mode
3. When AUDRST is driven low
4. When the AUDSRST bit in the SYSCR register is cleared to 0 (see section 24.2.2)
5. When the MSTP3 bit in the MSTCR2 register is set to 1 (see section 24.2.3)
23.5.2
The debugger is not initialized in software standby mode. However, since this LSI's internal
operation halts in software standby mode:
1. When AUDMD is high (RAM monitor mode), Ready is not returned (Not Ready continues to
2. When AUDMD is low (branch trace mode), operation stops. However, operation continues
23.5.3
There is a debugging tool for generating the AUDCK signal from the CK signal. See the manual
of the debugging tool to set the pin function controller (PFC).
23.5.4
1. HSTBY/module standby
2. AUDRST = low-level input
be returned).
However, when operating on an external input clock, the protocol continues.
AUDMD
AUDCK
AUDSYNC
AUDATA
AUDMD
AUDCK
AUDSYNC
AUDRST
when software standby is released.
Usage Notes
Initialization
Operation in Software Standby Mode
Setting the PA15/CK/POE6/TRST/BACK pin
Pin States
Z
Z
Z
Z
Input
(1) AUDMD = high: Input
(1) AUDMD = high: Input
Low-level input
(2) AUDMD = low: High-level Output
(2) AUDMD = low: High-level Output
Rev. 2.00, 09/04, page 601 of 720