HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 457

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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HD64F7047FW40V
0
Bit
9
8
7
6
Bit Name
TST1
TST0
MCR7
0
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
R
Description
Disable Tx Output
Controls the Tx Output pin to output transmit data or
recessive bits. If this bit is enabled, the internal transmit
output value appears on the Tx pin. If this bit is disabled,
the Tx Output pin always remains recessive.
0: External Tx pin is supplied for the CAN Interface block
1: [TST0 = 0] Tx always recessive on the Tx pin
Enable Internal Loop
Enables/disables the internal TX looped back to the
internal Rx.
0: Rx is fed from the Rx Pin
1: Rx is fed back from the internal Tx signal
HCAN2 Sleep Mode Release
When this bit is set to 1, the HCAN2 automatically exits
HCAN2 sleep mode on detection of CAN bus operation.
Reserved
This bit is always read as 0. The write value should
always be 0.
[TST0 = 1] Tx is internally looped backed to the Internal
Rx
Rev. 2.00, 09/04, page 415 of 720

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