HD64F7047FW40V Renesas Electronics America, HD64F7047FW40V Datasheet - Page 533

MCU 5V 256K I-TEMP,PB-FREE 100-Q

HD64F7047FW40V

Manufacturer Part Number
HD64F7047FW40V
Description
MCU 5V 256K I-TEMP,PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047FW40V

Core Processor
SH-2
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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16.3.10 Timer Period Data Register (TPDR)
The timer period data register (TPDR) functions as a 16-bit compare register. In the operating
modes, the TPDR register value is constantly compared with the TCNT counter value, and when
they match the TCNT counter changes its count direction from up to down. The initial value of
TPDR is H'FFFF. Only 16-bit access can be used on TPDR; 8-bit access is not possible.
16.4
Operation
When the operating mode is selected, a 3-phase PWM waveform is output with a non-overlap
relationship between the positive and negative phases.
The PUOA, PUOB, PVOA, PVOB, PWOA, and PWOB pins are PWM output pins, the PCIO pin
(when set to output) functions as a toggle output synchronized with the PWM waveform, and the
PCI0 pin (when set to input) functions as the counter clear signal input. The TCNT counter
performs up- and down-count operations, whereas the TDCNT counters perform up-count
operations.
Rev. 2.00, 09/04, page 491 of 720

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