hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 96

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

12.2. SMT Block Status Word (BSW) Description
The SMT bus monitor stores a Block Status Word in the Command Stack for each monitored MIL-STD-1553 message.
This word provides information regarding message status, the bus on which the message occurred, whether errors
occurred during the message, and the type of occurring errors. The Block Status Word for SMT mode is defined as
follows:
15 14 13 12 11 10 9
Bit No.
0
15
14
13
0
0
Mnemonic
EOM
SOM
BID
0
(Not IRIG-106 Chapter 10 Compliant)
with Extended Status Bits Enabled
0
SMT Block Status Word
0
0
8
0
RW
R/W
R/W
R/W
R/W
7
0
0
6
Reset
0
5
0
0
0
4
0
0
3
HOLT INTEGRATED CIRCUITS
Function
End of Message.
Bit 15 is set upon completion of a monitored message, whether or not
errors occurred. When EOM is set, SOM bit 14 is concurrently reset.
Start of Message.
Bit 14 is set to logic 1 approximately 3-4 µs after completion of a valid
Command Word, and is reset to logic 0 at the end of the message.
If the monitor uses message filtering, SOM is only set for monitored
messages.
Bus ID (Bus B / Bus A).
Bit 13 indicates the bus ID for the message. This bit is logic 0 for a
message occurring on Bus A. This bit is logic 1 for a message occurring
on Bus B.
0
2
HI-6130, HI-6131
0
1
0
0
MR Reset
Host Access
Bit
96