hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 247

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

* Command is illegal but terminal is not using “illegal command detection” (in form response).
** Command is illegal and terminal is using “illegal command detection”
*** Undefined mode command rendered invalid by UMCINV option bit. Command’s bit in Illegalization Table is “don’t care”.
Circumstances for
Received Message
RESERVED MODE
CODES MC9 - MC15:
Mode code command
with mode codes
01001 through 01111
and T/R bit equals 1
The mode code’s bit
in Illegalization Table
equals 0 *
OR
The mode code’s bit
in Illegalization Table
equals 1 **
MC9 - MC15
EXCEPTIONS:
Invalid command word.
OR
T/R bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 0 *
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 1 **
Mode code command
word is followed by a
contiguous data word
Terminal Response to
Received Command
The reserved mode code
commands do not have
defined terminal actions.
Host must initialize device
to respond using either of
the two following methods:
RT is not using “illegal
command detection.”
Respond “in form”: Reset
Message Error (ME) status
and transmit Status Word.
OR
RT is using “illegal
command detection”and
mode code is illegalized.
Set Message Error (ME)
status and transmit Status
Word.
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/R bit equals 0)
Respond “In form”: Reset
Message Error (ME) status.
If not broadcast, transmit
Status Word. If broadcast,
set the BCR status bit and
suppress status response.
Set Message Error (ME)
status. If not broadcast,
transmit Status Word.
If broadcast, also set
Status Word BCR bit and
suppress Status response.
No Status Word transmit.
Set the Message Error
(ME) status bit.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
247
Bits Updated
in Descriptor
Control Word
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
No Change
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
Bits Updated in Data
Buffer Msg Info Word
Normal CS update:
BUSID bit reset.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
ILCMD bit set.
BUSID bit updated.
MERR bit set.
RTRT bit reset.
(Other error bits reset.)
No Message Info
Word is written
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
ILCMD bit set.
MERR bit set.
BUSID bit updated.
RTRT bit reset.
(Other error bits reset.)
MERR bit set.
WCTERR bit set.
BUSID bit updated.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
Interrupt
Options
IWA
ILCMD
IWA
None
IWA
IBR
ILCMD
IWA
IBR
MERR
IWA