hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 86

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hi-6131pqtf

Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
11.11. Bus Controller (BC) Time Tag Utility Register (0x0045)
11.12. Bus Controller (BC) Time Tag Utility High Register (0x0046)
These registers are read-write and are cleared after MR pin Master Reset. This utility register pair is used for simul-
taneously loading a 16- or 32-bit value into the BC Time Tag Counter. When loading, the value contained in utility reg-
ister 0x003D is copied into BC Time Tag Counter register 0x0043. If the BC is configured for 16-bit time base, register
0x0043 contains the entire 16-bit count. If configured for 32-bit time base operation, count bits 31-16 are simultane-
ously copied from utility register 0x003E into BC Time Tag Counter register 0x0044. Please refer to the description for
bits 13-12 in the “Time Tag Counter Configuration Register (0x0039)” on page 43.
11.13. Bus Controller (BC) Time Tag Match Register (0x0047)
11.14. Bus Controller (BC) Time Tag Match High Register (0x0048)
These registers are read-write and are cleared after MR pin Master Reset. When the BCTTM bit 5 is logic 1 in the
Hardware Interrupt Enable Register 0x000F, an interrupt occurs when the BC time tag count matches the value stored
in this register pair. If the BC is configured for 16-bit time base, match register 0x0045 is compared to time base count
register 0x0043 for match determination. If configured for 32-bit time base operation, count bits 31-16 in match register
0x0046 is also compared to BC Time Tag Counter register 0x0044 for match determination. Please refer to the descrip-
tion for BCTTM bit 5 in the Hardware Interrupt Registers in Section 9.5.
MSB
MSB
MSB
MSB
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Value
Register Value
Register Value
Register Value
0
9
0
9
0
9
0
9
0
8
0
8
0
8
0
8
RW
RW
RW
RW
7
7
7
7
0
0
0
0
0
6
0
6
0
6
0
6
0
0
0
0
5
5
5
5
4
4
4
4
0
0
0
0
0
3
0
3
0
3
0
3
HOLT INTEGRATED CIRCUITS
0
0
0
0
2
2
2
2
HI-6130, HI-6131
0
1
0
1
0
1
0
1
LSB
LSB
LSB
LSB
0
0
0
0
0
0
0
0
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
86

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