hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 175

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

19.5.3. Data Buffer Options for Mode Code Commands
Data buffer options for mode code commands differ from options offered for subaddress commands. Mode commands
cannot use either circular data buffer method, but may use double (ping-pong) buffering or single (indexed) buffering.
Single message Index mode (INDX = 0) is suitable in many applications (see Section XX). An alternative called
Simplified Mode Command Processing (SMCP) may be globally applied for all mode code commands (see Section
XX).
To use single (indexed) buffer or double (ping-pong) buffer for mode commands, the SMCP bit in Configuration Reg-
ister 1 is logic 0. The Control Word PPEN bit for each mode command determines whether ping-pong or indexed
buffering is used.
To use Simplified Mode Command Processing, the SMCP bit in Configuration Register 1 is set to logic 1. The Control
Word PPEN bit for mode commands is “don’t care” (no longer specifies index or ping-pong buffer mode) because Sim-
plified Mode Command Processing stores mode command data and message information words directly within each
mode command’s redefined Descriptor Table block. When SMCP is enabled, mode code command descriptor blocks
(in the Descriptor Table) do not contain data pointers to reserved buffers elsewhere in the shared RAM. Instead, each
4-word descriptor block itself contains the message information word, the time-tag word and the data word transacted
for each mode command (for mode codes 16-31 decimal).
When Simplified Mode Command Processing is used, the range of active bits is reduced in each receive or transmit
mode command Control Word. Interrupt control and response is not affected by the SMCP option. Simplified Mode
Command Processing is fully presented in the later data sheet section entitled “Mode Code Commands.”
Bit No. Mnemonic R/W
3
2
1
0
STOPP
PPEN
CIR2EN
CIR1EN
Reset
0
0
0
0
Function
Stop Ping-Pong Request.
The host asserts this bit to suspend ping-pong buffering for this subaddress.
The host resets this bit to ask the RT to re-enable ping-pong. The RT con-
firms recognition of ping-pong enable or disable status by writing PPON bit 8.
Refer to Section XX, which describes ping-pong mode in detail.
Ping-Pong, Circular Buffer Mode 2 or Circular Buffer Mode 1 Enable.
The PPEN, CIR2EN and CIR1EN bits are initialized by the host to select
buffer mode. The table below summarizes how buffer mode selection is
encoded.
In the case of ping-pong, the host initializes the PPEN bit to logic one after
reset to enable ping-pong buffering for this subaddress. The host asserts
STOPP bit 3 to ask the device to temporarily disable ping-pong. Negating the
STOPP bit asks the device to re-enable ping-pong. The device confirms ping-
pong enable or disable state changes by writing the PPON bit.
HOLT INTEGRATED CIRCUITS
PPEN
HI-6130, HI-6131
1
0
0
0
175
Don’t Care
CIR2EN
1
0
0
Don’t Care
Don’t Care
CIR1EN
1
0
Circular Mode 2
Circular Mode 1
Indexed Single
Buffer Mode
Ping-Pong
Buffer