hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 37
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hi-6131pqtf
Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
1.HI-6131PQTF.pdf
(271 pages)
- Current page: 37 of 271
- Download datasheet (6Mb)
9.4.
This 16-bit register is read-only and is fully maintained by HI-613x logic. The register contains 0x0180 after MR pin
master reset. It is not affected by assertion of MTRESET, RT1RESET or RT2RESET bits in the Master Status and
Reset Register (0x0001). Bits 8:0 contain a 9-bit address pointer to the 64-word Interrupt Log Buffer located in RAM.
The value in Interrupt Log Address register bits 8:0 indicates the storage address where interrupt information words
will be stored for the next occurring interrupt, 0x0180 - 0x019E. The value is always even since two words are stored
for each interrupt. The three highest address bits (register bits 8:6) are always 1-1-0.
Bits 15:9 contain a 7-bit count value for the number of interrupts logged (0 - 127) since the Interrupt Count & Log
Address Register was last read. The count increment stops at 127. Counting continues above 32 so the host can
detect when buffer overrun has occurred. Bits 15:9 are reset automatically when the host reads this register.
After MR master reset, the HI-613x initializes this register to 0x0180, an interrupt count of zero and log address of
0x180. During terminal operation, the host can read bits 15:9 to see the number of interrupts logged in the buffer
since the last read operation upon the register. Information words for the 32nd interrupt are stored in buffer addresses
0x01BE and 0x01BF, and the Interrupt Log Address “rolls over” to read 0x0180, where interrupt information for the
33rd interrupt will be stored.
In the respective terminal device sections, definitions are provided for the interrupt management register triplets used
for BC (bus controller), MT (bus monitor terminal) and RT (remote terminal) interrupts.
MSB
15 14 13 12 11 10 9
0
0
Interrupt Count
Interrupt Count & Log Address Register (0x000A)
0
0
0
0
0
MSB
8
1
R
7
1
Interrupt Log Address
0
6
0
5
4
0
0
3
HOLT INTEGRATED CIRCUITS
0
2
HI-6130, HI-6131
0
1
0
0
MR Reset
Host Access
Bit
37
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