hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 67

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

10.4.4. BC Block Status Word
The Block Status Word in the Message Control / Status Block provides information regarding message status (in-
process or completed), the bus it was transmitted on, whether errors occurred during the message, and the type of
occurring errors. This word is written into RAM by the device after message completion. Because it resides in RAM,
the host has read-write access, although this word is usually treated as read-only by the host.
15 14 13 12 11 10
0
Bit No.
15
14
13
12
0
0
0
Mnemonic
EOM
SOM
BID
MBCE
0
0
0
9
0
8
RW
R/W Reset Function
R/W
R/W
R/W
R/W
7
0
0
6
0
5
0
0
0
0
4
0
End of Message.
This bit is set upon completion of a BC message, whether or not errors
occurred. When EOM is set, the current value of the Time Tag Word(s) is
(are) written to the corresponding Time Tag Word(s) in the BC Message
Control/Status Block.
Start of Message.
This bit is set at the start of a BC message and cleared at the end of the
message. When SOM is set (and reset), the current value of the Time Tag
Word(s) is (are) written to the corresponding Time Tag Word(s) in the BC
Message Control/Status Block.
Bus ID (Bus B / Bus A).
This bit is logic 1 if the BC message was transacted on Bus B.
This bIt is logic 0 if the BC message was transacted on Bus A.
Message Block Coding Error.
A programming test aid, this bit only applies when CHKFMT bit 13 is logic
1 in the BC Configuration Register. Each message BC Control Word has
flags that indicate format: mode code command (bit 2), RT-RT message
(bit 1) and broadcast message (bit 0). When CHKFMT is 1, these flags
are compared to the message Command Word(s) that follow the Control
Word in the Message Block. When message format mismatch occurs (a
BC programming error), this MBCE bit is set in the message Block Status
Word. See CHKFMT description in “BC (Bus Controller) Configuration
Register (0x0032)” on page 71.
0
3
HOLT INTEGRATED CIRCUITS
0
2
HI-6130, HI-6131
0
1
0
0
MR Reset
Host Access
Bit
67