hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 145

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

18.2. Remote Terminal 1 (RT1) Operational Status Register (0x0018)
At rising edge on the MR Master Reset input pin, register bits 15-9 capture the logic states (0 or 1) of the correspond-
ing input pins having like names. After reset, register bits 15-9 can be overwritten only if LOCK bit 9 is logic 0. If the
register LOCK bit is logic 1, these bits are read-only.
Bits 8-0 are read-only; these bits are cleared after MR pin master reset, but are unaffected by assertion of RTxRESET
remote terminal software reset in the Master Status and Reset Register (0x0001).
15 − 11
15 14 13 12 11 10
Bit No.
Bit No.
RW (see LOCK bit 9)
10
These bits latch pins
1
0
Remote Terminal 2 (RT2) Operational Status Register (0x0021)
Mnemonic
MC16OPT
MC8OPT
Mnemonic
RTA4:0
RTAP
9
8
0
R/W
R/W
R/W
R/W
R/W
7
0
0
6
Reset
Reset
0
5
0
0
0
R
4
0
0
3
HOLT INTEGRATED CIRCUITS
Function
Host reset of “service request” status bit for mode code 16.
If this bit is logic 0, reception of a “transmit vector word” mode command
(MC16) causes automatic reset of the Service Request status bit. The
Service Request bit is reset in the Status Word Bits register before
status word transmission begins. If the MCOPT1 bit is logic 1, the
external host assumes responsibility for resetting the Service Request
bit in the Status Word Bits register.
Automatic soft reset for mode code 8.
If this bit is logic 0, reception of a “reset remote terminal” mode
command (MC8) causes automatic assertion of SRESET software
reset. If non-broadcast mode command, reset occurs after status word
transmission is complete. If this bit is logic 1, the external host assumes
responsibility for actions needed to perform terminal reset.
Function
Remote Terminal Address bits 4-0.
Remote Terminal Address Parity.
These bits reflect the active remote terminal address. They reflect the
state of the input pins RTA4 through RTA0 that applied at the rising edge
of the MR master reset input signal. The RTAP bit, when appended
to the remote terminal address bits, provides odd parity. If the register
LOCK bit is high, bits 15-10 are read-only. If the register LOCK bit is low,
the host can overwrite these bits change the terminal address and parity.
0
2
HI-6130, HI-6131
0
1
0
0
MR Reset
Host Access
Bit
Bit
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