hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 254

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Circumstances for
Received Message
OVERRIDE
SELECTED
TRANSMITTER
SHUTDOWN (MC21):
Mode code command
with mode code
10101
and T/R bit equals 1
After Status Word transmission, the device stores received data word in the assigned index or ping-pong buffer
(or in Descriptor Word 4 if SMCP Simplified Mode Command Processing applies).
If the MCOPT4 bit in Configuration Register 2 equals 0, the received data word is compared to the value in
the Bus Select Register corresponding to the inactive bus. For example, if the command is received on Bus A,
the comparison uses the Bus B Select Register value. If the compared values match, the device automatically
re-enables transmit and receive for the inactive bus, regardless of the state of the SDSEL bit in Configuration
Register 2. The device affirms fully reenabled bus status by resetting all four TXASD, TXBSD, RXASD and/
or RXBSD bits in the Built-In Test Register at register address 0x0014. Note: If the TXINHA or TXINHB input
pins are asserted, the device cannot override the resulting hardware transmit inhibit for the affected bus. In this
case, the corresponding TXASD and/or TXBSD bits remain high. See Built-In Test Register description for further
information.
If MCOPT4 bit in Configuration Register 2 equals 1, the IWA interrupt is typically used to alert the host when an
MC21 command is received. The host must evaluate whether the received mode data word matches the bus
selection criteria. If bus selection criteria is met, the host fulfills the “override shutdown” command using one of
two options:
1. reset the bus shutdown bit INHBUSA or INHBUSB for the inactive bus in Configuration Register 1 to reenable
OR
2. reset the transmit shutdown input pin TXINHA or TXINHB for the inactive bus to re-enable transmit if the host
MC21 EXCEPTIONS:
Invalid command word.
OR
T/R bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 0 *
both transmit and receive, if the host used this bit to shut down transmit and receive for an earlier MC4 or MC20
command. (Resetting this shutdown bit does not restore bus transmit capability if a TXINHA or TXINHB input
pin is asserted.)
used this pin to shut down transmit only for an earlier MC4 or MC20 command.
Terminal Response to
Received Command
Default response: Reset
Message Error (ME)
status. and transmit
Status Word. If broadcast,
set the BCR status bit and
suppress Status response.
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/R bit equals 0)
Respond “In form”: Reset
Message Error (ME) status.
If not broadcast, transmit
Status Word. If broadcast,
set the BCR status bit and
suppress status response.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
254
Bits Updated
in Descriptor
Control Word
DBAC bit reset.
BCAST bit reset.
DPB bit toggles.
No Change
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
Bits Updated in Data
Buffer Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
No Message Info
Word is written
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
Interrupt
Options
IWA
None
IWA
IBR