hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 104

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

13.2. SMT Bus Monitor Address List Start Address Register (0x002F)
This 16-bit register is Read-Write and is fully maintained by the host. After MR pin master reset, this register is
initialized with 0x00B0, the default base address of the MT Address Table in device RAM. The host can overwrite the
default base address. This register is not affected by MT soft reset, when the MTRESET bit is asserted in the Master
Status and Reset Register, 0x0001. The Address List for SMT mode is explained in Section XX.
13.3. SMT Last Message Command Stack Pointer (0x0031)
This 16-bit register is read-only and is updated by the MT upon completion of a monitored MIL-STD-1553 message.
This register is cleared after MR pin master reset or by MT soft reset, when the MTRESET bit is asserted in the Master
Status and Reset Register, 0x0001.
This register contains the RAM address for the first word stored in the Command Stack for the last completed
MIL-STD-1553 message.
MSB
MSB
Bit No.
15 14 13 12 11 10
15 14 13 12 11 10
0
0
2
1
0
0
0
0
0
Mnemonic
MTXMF
48BTT
SMT / IMT
0
0
0
0
0
0
Register Value
Register Value
0
9
0
9
0
8
0
8
R/W
R/W
R/W
R/W
RW
RW
7
7
1
0
0
6
0
6
Reset
1
0
5
5
0
0
0
4
4
1
0
0
3
0
3
HOLT INTEGRATED CIRCUITS
Function
Extended Message Flag Enable.
Usually register bit 2 is set to logic 1 to enable expanded status/error
flags, occupying the “reserved” bit positions in the IRIG-106 Block Status
Word.
When register bit 2 equals 0, the recorded status/error flags are limited
to the defined bits in the IRIG-106 Block Status Word. This is described
in Section XX.
48-Bit Time Tag / 16-Bit Time Tag
When register bit 1 equals 0, the SMT time tag counter operates with 16-
bit resolution and the recorded entry for each MIL-STD-1553 message in
the Command Stack is four 16-bit words.
When register bit 1 equals 1, the SMT time tag counter operates with
48-bit resolution. To record the 48-bit time count, the entry for each MIL-
STD-1553 message in the Command Stack is eight 16-bit words. Two
of the words added are used for Response Time and Message Length
words. See Section 13.5.
Select Simple Monitor Terminal (SMT) or IRIG-106 Monitor Terminal
(IMT).
For SMT operation, this register bit must be logic 1.
0
0
2
2
HI-6130, HI-6131
0
1
0
1
LSB
LSB
0
0
0
0
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
104