hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 110

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Bit No.
15 − 9
2 − 0
8
7
6
5
4
3
Mnemonic
Reserved
CSTKRO
DSTKRO
CSTKMAT
DSTKMAT
SMTMERR
SMTEOM
Reserved
Function
These bits are not used in SMT monitor mode. They should be initialized logic 0 in the
SMT Interrupt Enable Register. These bits will always read logic 0 in the SMT Pending
Interrupt Register.
Command Stack Rollover Interrupt.
The Command Stack Pointer value (Word 1 in the SMT Address List) has rolled over to
the Command Stack Start Address (Word 0 in the SMT Address List).
Data Stack Rollover Interrupt.
The Data Stack Pointer value (Word 5 in the SMT Address List) has rolled over to the
Data Stack Start Address (Word 4 in the SMT Address List).
Command Stack Address Match Interrupt.
The Command Stack Pointer value (Word 1 in the SMT Address List) has reached the
Command Stack Address Match value in Word 3 of the SMT Address List.
Data Stack Address Match Interrupt.
The Data Stack Pointer value (Word 5 in the SMT Address List) has reached the Data
Stack Address Match value in Word 7 of the SMT Address List.
SMT Message Error Interrupt.
A non-broadcast MIL-STD-1553 message ended with an RT Status Word containing the
ME Message Error status bit set.
SMT End of Message Interrupt.
Successful completion of a MIL-STD-1553 message, regardless of validity.
Bits 2-0 cannot be written, and read back 000.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
110