hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 59

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hi-6131pqtf

Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
Name
XQF
XFG
Instruction
Execute and
Flip
Unconditional
Execute, Flip
and Go
Unconditional
Op
Code
0x15
0x1A
Parameter
RAM Address for
Message Control/
Status Block
RAM Address for
Message Control/
Status Block
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
Function
Unconditionally execute the message at the parameter-
specified Message Control/Status Block Address. At
message completion, if the Condition Code evaluates
True, then toggle bit 4 of the Message Control/Status Block
Address, and store the new Message Control/Status Block
Address as the updated value of the parameter following
the XQF instruction op code. As a result, the next time
this address in the BC Instruction List is executed, the
processed Message Control/ Status Block resides at the
updated address (old address XOR 0x0010) instead of the
old address. Otherwise (Condition Code Evaluates False)
the value of the Message Control/Status Block Address
parameter is not changed.
At the start of XQF message execution, if the fourth word in
the Message Control/Status Block is nonzero, it is copied to
the BC Time to Next Message Register, and message timer
begins decrementing. The BC message sequencer does not
fetch the next instruction op code until this message timer
reaches zero.
Unconditionally execute the message at the parameter-
specified Message Control/Status Block Address. At
message completion, if the Condition Code evaluates
True, then toggle bit 4 of the Message Control/Status Block
Address, and store the new Message Control/Status Block
Address as the updated value of the parameter following
the XFG instruction op code. As a result, the next time
this address in the BC Instruction List is executed, the
processed Message Control/ Status Block resides at the
updated address (old address XOR 0x0010) instead of the
old address. Otherwise (Condition Code Evaluates False)
the value of the Message Control/Status Block Address
parameter is not changed.
At the start of XQG message execution, if the fourth (Time
to Next Message) word in the Message Control/Status
Block is nonzero, it is copied to the BC Time to Next
Message Register 0x0036, and this message timer begins
countdown. Completion of an XQG message may occur
while message timer countdown continues.
Unlike XQF, the XFG op code does not wait for the
decrementing message timer to hit 0 before fetching the
next instruction op code. As long as op codes following XFG
do not execute a 1553 message, each op code is performed
after fetch. Upon reaching a following XEQ, XQG, XQF
or XFG execute-message instruction, transaction of its
1553 message does not begin until Time to Next Message
count reaches 0. Thus, programmed 1553 message timing
is maintained, while allowing execution of non-message
instruction op codes.
59

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