hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 237

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

* Command is illegal but terminal is not using “illegal command detection” (in form response).
** Command is illegal and terminal is using “illegal command detection”
*** Undefined mode command rendered invalid by UMCINV option bit. Command’s bit in Illegalization Table is “don’t care”.
Circumstances for
Received Message
DYNAMIC BUS
CONTROL (MC0):
Mode code command
with mode code
00000 and T/R bit
equals 1
The mode code’s bit
in Illegalization Table
equals 0 *
OR
The mode code’s bit
in Illegalization Table
equals 1 **
MC0 EXCEPTIONS:
Broadcast address
RT31 (broadcast not
allowed)
Mode code command
word is followed by a
contiguous data word
Invalid command word.
OR
T/R bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
Terminal Response to
Received Command
HI-6110 is not equipped to
accept bus control duties. The
host must initialize device to
respond using either of the two
following methods:
RT is not using “illegal
command detection.”
Respond “in form”: Reset
Message Error (ME) status
and transmit Status Word.
OR
RT is using “illegal
command detection”and
mode code is illegalized.
Set Message Error (ME)
status and transmit Status
Word.
No Status Word transmit.
Set the Message Error
(ME) and BCR status bits.
No Status Word transmit.
Set the Message Error
(ME) status bit.
No terminal response,
the message is ignored.
No Status Word change.
(MC0 is not ndefined
when T/R bit equals 0)
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
237
Bits Updated
in Descriptor
Control Word
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
DBAC bit set.
BCAST bit set.
DPB toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
No Change
Bits Updated in Data
Buffer Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
ILCMD bit set.
BUSID bit updated.
MERR bit reset.
RTRT bit reset.
(Other error bits reset.)
MERR bit set.
BUSID bit updated.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
MERR bit set.
WCTERR bit set.
BUSID bit updated.
ILCMD, RTRT bits
reset.
(Other error bits reset.)
No Message Info
Word is written
Interrupt
Options
IWA
ILCMD
IWA
MERR
IWA
IBR
MERR
IWA
None