hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 204

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Allocated space in the data buffer (see column 3, Table
16) assumes each message has the maximum 32 data
words. If messages contain less than 32 words, the
data buffer size can be reduced. Since Circular Buffer
Mode 2 counts messages, values in all remaining Table
16 columns remain valid when message word count is
reduced.
The host may read the MIBA value to determine the
number of messages that have occurred since initializa-
tion. By reading the initially-zeroed lower bits of the MIB
Address, the host may determine the number of the next
occurring message.
From Table 16, a block of 128 messages requires 8
trailing zeros in the initial MIBA address, for example,
0x0F00. After each message is completed, the MIBA
value is updated (0x0F02, 0x0F04, etc.) The device
detects message block completion when all required
Number of
Messages
128
256
512
Table 16. Circular Buffer Mode 2 (Initialization factors based on message block size)
16
32
64
2
4
8
Control Word
CIR2ZN Field
0010 (2)
0100 (4)
0101 (5)
1000 (8)
1001 (9)
1010 (A)
Bits 7:4
0011 (3)
0110 (6)
0111 (7)
Required Data
Words / Msg
Space if 32
16,384
1,024
2,048
4,096
8,192
HOLT INTEGRATED CIRCUITS
128
256
512
64
HI-6130, HI-6131
MIB Space, 2
Words / Msg
204
Required
1,024
128
256
512
initially-zero trailing address bits equal 1 after MIBA is in-
cremented once. In our example, MIBA would increment
from 0x0FFE to 0x0FFF. When “full count” occurs, the
device updates MIBA to the original value (e.g., 0x0F00)
and copies the SA starting address value to CA current
address register, ready for buffer service by the host.
The device optionally generates a “buffer empty-full” in-
terrupt for the host when block transfer is completed.
During block transfer, the host can read the MIBA value
to determine the number of additional messages need-
ed before the N-message data block is complete.
Message processing for all commands begins with the
RT reading the unique descriptor block for the subad-
dress specified by the T/R bit, subaddress and word
count fields in the received command word.
16
32
64
4
8
Required Leading and Trailing Zeros
Initial MIBA Value, Showing the
0xxxxxxxxxxxx00
0xxxxxxxxxxx000
0xxxxxxxxxx0000
0xxxxxxxxx00000
0xxxxxxxx000000
0xxxxxxx0000000
0xxxxxx00000000
0xxxxx000000000
0xxxx0000000000