hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 178
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hi-6131pqtf
Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
1.HI-6131PQTF.pdf
(271 pages)
- Current page: 178 of 271
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19.5.5. Transmit Mode Control Word
Transmit Mode Control Words apply when the command word T/R bit equals one (transmit) and the subaddress field
has a value of 0 or 31 (0x1F). The descriptor Control Word defines terminal command response and interrupt behavior,
and conveys activity status to the host. It is initialized by the host before terminal execution begins. Bits 8-11 cannot be
written by the host; these bits are updated by the device during terminal execution, that is, when Configuration Register
1 STEX bit equals 1. The host can write bit 2 only when STEX equals zero; bits 3 and 12-15 can be written anytime.
This register is cleared to 0x0000 by MR master reset. Software reset (SRST) clears just the DBAC, DPB and BCAST
bits. Following any read cycle to the Control Word address, the DBAC bit is reset.
When single-message indexed buffering or ping-pong buffering is used instead of SMCP (Simplified Mode Code Pro-
cessing), the transmit mode Control Word looks like this:
Bit No. Mnemonic R/W
7-4
1,0
8
3
2
PPON
-----
STOPP
PPEN
-----
Reset
0
0
0
0
0
Function
Ping-Pong Enable Acknowledge.
This bit is read only and only applies for mode commands using ping-pong
mode (PPEN bit 2 was initialized to logic 1 by the host after reset). The
device asserts this bit when it recognizes ping-pong is active for this mode
code. Before off-loading the receive data buffer for this mode code, the host
can ask the device to temporarily disable ping-pong by asserting STOPP
bit 3. The device acknowledges ping-pong is disabled by negating PPON.
The host can safely load or off-load the buffer without data collision while
PPON is negated. After buffer servicing, the host asks the device to re-enable
ping-pong by negating STOPP bit 3. The device acknowledges ping-pong is
re-enabled by asserting PPON.
If PPEN bit 2 is high and PPON bit 8 is low when new commands arrive
for this subaddress, ping-pong is disabled. Each new message overwrites
existing data in the buffer specified by DPB bit 10, and the DPB bit does not
toggle after command completion.
Not Used
Stop Ping-Pong Request.
The host asserts this bit to suspend ping-pong buffering for this mode code.
The host resets this bit to ask the device to re-enable ping-pong. The device
confirms recognition of ping-pong enable or disable status by writing PPON
bit 3.
Ping-Pong Buffer Enable.
The PPEN bit is initialized by the host to select buffer mode. If this bit is high,
ping-pong buffering is selected. If this bit is low, indexed single buffering is
selected.
After reset, the host initializes this bit to logic 1 to enable ping-pong buffering
for this mode code. The host asserts STOPP bit 3 to ask the device to tempo-
rarily disable ping-pong. Negating the STOPP bit asks the device to re-enable
ping-pong. The device confirms ping-pong enable or disable state changes
by writing the PPON bit.
Not Used.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
178
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