hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 100

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Each RT Address from 0 to 31 decimal has four 16-bit table words: two words enable/disable individual Receive
Subaddresses, two more words enable/disable individual Transmit Subaddresses. The first four table words apply to
Subaddress 0 and are illustrated in Table 11. This 4-word pattern repeats for all 32 Subaddresses, 0-31 decimal.
Word Bit #
Transmit SA
Word Bit #
Transmit SA
Word Bit #
Transmit SA
Word Bit #
Transmit SA
Table address 0x0103
Table address 0x0102
Table address 0x0101
Table address 0x0100
bit equals logic 0. The message is not monitored when the bit equals 1.
Table 11. SMT Message Filter Table (RT Address 0 example)
A subaddress message is monitored when the corresponding word
15
31
15
31
15
15
15
15
14
30
14
30
14
14
14
14
13
29
13
29
13
13
13
13
HOLT INTEGRATED CIRCUITS
12
28
12
28
12
12
12
12
HI-6130, HI-6131
11
27
11
27
11
11
11
11
RT Address 0, Transmit Subaddresses 31 to 16
RT Address 0, Receive Subaddresses 31 to 16
10
26
10
26
10
10
10
10
RT Address 0, Transmit Subaddresses 15 to 0
RT Address 0, Receive Subaddresses 15 to 0
100
25
25
9
9
9
9
9
9
24
24
8
8
8
8
8
8
23
23
7
7
7
7
7
7
22
22
6
6
6
6
6
6
21
21
5
5
5
5
5
5
20
20
4
4
4
4
4
4
19
19
3
3
3
3
3
3
18
18
2
2
2
2
2
2
17
17
1
1
1
1
1
1
16
16
0
0
0
0
0
0