hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 218

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hi-6131pqtf

Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
23.2. Remote Terminal 2 (RT2)
This is initiated when RT2RESET bit 11 is set in the Master Status and Reset Register 0x0001. The following actions
are performed.
RT2 automatically starts (RT2STEX is set in register 0x0000) after soft reset completion, if these requirements are
met:
Terminal Checksum stored at 0x01E0 by
These 522 locations comprise the RT2
Clears these entire register addresses
EECOPY created the EEPROM image. A new EEPROM image is needed to allow auto-start after RT1 soft reset.
The RT1STEX bit 4 is logic 0 in the EEPROM Master Configuration Register image because the unlock codes
used by EECOPY were wrong. A new EEPROM image is needed to allow auto-start after RT1 soft reset.
The RT2ENA pin is logic 1 during the soft reset event
The RT2ENA pin and RT2ENA bit 7 were both logic 1 in the Master Configuration Register when EECOPY
created the EEPROM image.
The RT2STEX bit 5 is logic 1 in the EEPROM Master Configuration Register image because the EECOPY unlock
codes during programming were Unlock Word 1 = 1010-XXXX-11XX-1010 and Unlock Word 2 = 0101-XXXX-
00XX-0101 where X denotes “don’t care”.
Loads these registers from EEPROM
Clears these individual register bits
EECOPY process
Action
Table 21. RT2 Soft Reset Summary
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
Note: This register reload potentially affects both RTs.
0x0016 RT1 & RT2 Interrupt Output Enable Register (see note)
0x0009 RT1 and RT2 Pending Int Register, RT2 int bits 15 – 10
0x0012 RT1 & RT2 Interrupt Enable Register (see note)
0x0000 Master Configuration Register, RT2STEX bit 3
0x0023 RT2 MIL-STD-1553 Status Word Bits Register
0x0006 Hardware Pending Int Register, RT2APF bit 4
0x0022 RT2 Descriptor Table Base Address Register
0x0013 Hardware Interrupt Output Enable Register
0x0006 Hardware Pending Int Register, RTIP bit 2
218
0x0300 through 0x03FF: RT2 Illegalization Table
0x0600 through 0x07FF: RT2 Descriptor Table
0x000F Hardware Interrupt Enable Register
0x0028 RT2 Alternate BIT Word Register
0x0021 RT2 Operational Status Register
0x0027 RT2 Built-In Test Word Register
0x004C RT2 Time Tag Utility Register
0x0020 RT2 Configuration Register
0x0026 RT2 Bus B Select Register
0x0025 RT2 Bus A Select Register
0x004B RT2 Time Tag Counter
Registers Affected

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