hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 103

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hi-6131pqtf

Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
Bit No.
6 − 5
4
3
Mnemonic
MTSRR1:0
MTCRIW
Reserved
R/W
R/W
R/W
R/W
Reset
0
0
0
HOLT INTEGRATED CIRCUITS
Function
MT Start-Record Requirement 1:0.
When register bits 6-5 equal 00, the MT starts recording a new
MIL-STD-1553 message when a properly encoded, complete
MIL-STD-1553 word with command sync is decoded: The command
sync is followed by 16 properly encoded data bits plus a 17th parity bit
expressing odd parity. No data is recorded until this condition is met.
This is the usual setting. (default setting)
When register bits 6-5 equal 01, the MT starts recording a new
MIL-STD-1553 message when a properly encoded, complete
MIL-STD-1553 word with command sync or data sync is decoded.
The properly encoded command sync (or data sync) is followed by 16
properly encoded data bits plus a 17th parity bit expressing odd parity.
If recording begins with data sync, the Sync Error flag will be set in the
Block Status Word.
When register bits 6-5 equal 10, the MT starts recording a new
MIL-STD-1553 message upon detection of a properly encoded
command sync with two contiguous data bits. If the properly
encoded command sync with two contiguous data bits does not result in
a valid command word, the Invalid Word Error is set in the Block Status
Word. This selection begins recording for complete MIL-STD-1553
command words as well as for command word fragments, or command
words with bad parity. Under some circumstances, this record option
might be helpful for debugging MIL-STD-1553 communication failure.
When register bits 6-5 equal 11, the MT starts recording new bus activity
upon detection of any properly encoded sync (command or data)
with two contiguous data bits. This selection begins recording for
complete MIL-STD-1553 command or data words as well as for word
fragments, or words with bad parity. If the properly encoded sync with
two contiguous data bits does not result in a valid Manchester II word,
the Invalid Word Error is set in the Block Status Word. If recording
begins with data sync, the Sync Error flag will be set in the Block Status
Word. Under some circumstances, this record option might be helpful for
debugging MIL-STD-1553 communication failure.
MT Continue Recording After Invalid Word.
When bit 4 equals 0, the MT stops recording an incomplete message
when an invalid MIL-STD-1553 word is decoded. The invalid word is not
stored, and the MT awaits word detection per register bits 6-5 before the
next MIL-STD-1553 message is recorded. (default)
When bit 4 equals 1, the MT continues recording an incomplete
message when an invalid MIL-STD-1553 word is decoded. The invalid
word is stored and the MT continues monitoring the message until
completion or time-out occurs.
Bit 3 is not used by the bus monitor operating in SMT mode.
Initialize this bit to logic 0.
HI-6130, HI-6131
103

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