hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 115

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Checksum is disabled, this field equals 0x00. If 16-bit Data Checksum is enabled, this field equals 0x02. Although bits
7-2 in this field always equal logic 0, the encoded significance for all eight Packet Flags is explained here:
14.3.8. Data Type.
This 8-bit field contains a value representing the type and format of the data. The HI-613x IMT always generates a
fixed Data Type value of 0x19, which represents a MIL-STD-1553B Format 1 data packet.
14.3.9. Relative Time Counter.
This 48-bit (3-word) field contains a value representing the 10 MHz Relative Time Counter (RTC). The RTC is derived
from an internal clock generator, and remains free running during each data packet recording. The 48-bit value applies
to the first bit of message data in the packet body.
14.3.10. Header Checksum.
This 16-bit (1-word) field contains the 16-bit arithmetic sum of all 16-bit words in the header, excluding the Header
Checksum word itself.
14.4. IRIG-106 Packet Trailer Description
IRIG-106 defines a Packet Trailer consisting of an optional Data Checksum, preceded by “filler words”. The standard
requires the overall packet length to be an even number of 16-bit words. The HI-613x IMT inserts 0x0000 “filler” words
to meet this requirement. Every packet generated by the HI-613x IMT has a Packet Trailer consisting of 2 or 3 filler
words (0x0000) followed by the 16-bit Data Checksum word.
Bit 1 in register 0x0029 enables/disables automatic generation of a 16-bit Data Checksum. When auto checksum
is disabled, the Packet Trailer simply consists of 3 or 4 filler words. When the configuration bit is logic 1, the 16-bit
checksum is written into the last packet word at packet finalization. If an 8- or 32-bit data checksum is needed, the
host must generate it. IRIG-106 defines the Data Checksum as the arithmetic sum of all of the bytes (8-bit checksum),
words (16-bit checksum) or long words (32-bit checksum) in the entire packet, excluding the 24-byte Packet Header
and the Data Checksum itself.
14.5. IRIG-106 Data Packet Trailer Description
The HI-613x IMT Packet Body consists of a 32-bit Channel Specific Data field, followed by one or more message data
blocks, with separate message data blocks for each monitored MIL-STD-1553 message.
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Packet Secondary Header is not present (bit 7)
Packet Header 48-bit Relative Time Count used for Intra-Packet Time Stamps (bit 6)
Sync error did not occur for Relative Time Count (bit 5)
Data Overflow error did not occur (bit 4)
Optional IRIG-106 Packet Secondary Header is not used (bits 3-2)
Data Checksum format: bits 1-0 always equal 00 or 10
00 = data checksum disabled (automatic, when register 0x0029 bit 1 = logic 0)
01 = 8-bit data checksum (option not available)
10 = 16-bit data checksum (automatic, when register 0x0029 bit 1 = logic 1)
11 = 32-bit data checksum (option not available)
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
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