HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 812

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 19 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 1.00 Dec. 27, 2005 Page 768 of 932
REJ09B0269-0100
Transmission flowchart
This LSI + memory
EtherC/E-DMAC
descriptor and
transmit buffer
initialization
Transmit
[Legend]
EtherC/E-DMAC initialization: Executes a software reset with the SWR bit in EDMR set to 1.
Transmit descriptor and transmit buffer setting: Sets transmit descriptors and transmit buffers, and sets EtherC
Start of transmission: Occurs when 1 is written to the TE bit in ECMR and the TR bit in EDTRR.
Transmit descriptor read: The E-DMAC reads a transmit descriptor.
Transmit data transfer: Writes transmit data to the transmit FIFO by using DMA transfer by the E-DMAC.
Transmit descriptor write-back: The E-DMAC writes 0 to the TACT bit and writes the transmit status to the transmit descriptor.
setting
Transmit descriptor read
Transmit data transfer
Transmit data transfer
Start of transmission
Transmit descriptor
read
Transmit descriptor
write-back
Figure 19.4 Sample Transmission
Transmit descriptor
write-back
E-DMAC
Transmission
completed
and E-DMAC registers, then writes 1 to the TE bit in ECMR
and the TR bit in EDTRR.
Transmit FIFO
Flowchart (Single-Frame/Two-Descriptor)
EtherC
Frame transmission
Ethernet