HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 69

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Classification
Ethernet
controller
(EtherC1/0)
RX-CLK1,
RX-CLK0
RX-DV1,
RX-DV0
ERXD13 to
ERXD10
ERXD03 to
ERXD00
MDC1,
MDC0
MDIO1,
MDIO0
WOL1,
WOL0
LNKSTA1,
LNKSTA0
EXOUT1,
EXOUT0
CAMSEN1,
CAMSEN0
Symbol
I
I
I
I
O
I/O
O
I
O
I
I/O
MAC1/0 receive
clock
MAC1/0 receive
data valid
MAC1 receive
data
MAC0 receive
data
MAC1/0
management
data clock
MAC1/0
management
data I/O
MAC1/0
general-purpose
external output
MAC1/0 CAM
input
Name
MAC1/0 Wake-
On-LAN
MAC1/0 link
status
Rev. 1.00 Dec. 27, 2005 Page 25 of 932
Timing reference pins (clock) for
RX-DV1/0, RX-ER1/0, ERXD13 to
ERXD10 and ERXD03 to
ERXD00. For a connection
example, refer to section 18,
Ethernet Controller (EtherC).
These pins indicate that valid
receive data is on ERXD13 to
ERXD10 and ERXD03 to
ERXD00. For a connection
example, refer to section 18,
Ethernet Controller (EtherC).
4-bit receive data pins. For a
connection example, refer to
section 18, Ethernet Controller
(EtherC).
4-bit receive data pins. For a
connection example, refer to
section 18, Ethernet Controller
(EtherC).
Reference clock pins for
information transfer via MDIO. For
a connection example, refer to
section 18, Ethernet Controller
(EtherC).
Bidirectional pins for exchanging
management information. For a
connection example, refer to
section 18, Ethernet Controller
(EtherC).
These pins indicate that a Magic
Packet has been received.
Link state input pins from the
PHY-LSI
External output pins
CAM interface pins input
Function
Section 1 Overview and Pin Function
REJ09B0269-0100