HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 750
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 750 of 980
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Section 18 Ethernet Controller (EtherC)
18.4
Operation
The following outlines the operations of the Ethernet controller (EtherC).
Automatic Ethernet Frame Transfer Function by Hardware: Each MAC controller can
transmit and receive independently using two ports of MAC controllers. Furthermore, relay
between the two MAC controllers can be performed by hardware using the on-chip TSU of the
EtherC. TSU selects one of the following processes depending on the MAC address of the
destination of the Ethernet frame input to the MAC controller according to on the settings of the
CAM and registers TSU_FWSL0/1, and TSU_FWSLC; 1) reception, 2) relay, 3) reception and
relay, and 4) discard. This setting can be performed independently for each port at the receive and
relay sides by means of registers TSU_TEN and TSU_POST1 to TSU_POST4. It also has a 6-
kbyte TSU FIFO for temporarily retaining the frames relayed. This TSU FIFO can vary capacity
allotment with port 0 to 1 transfer and port 1 to 0 transfer using the TSU FIFO size select register
(TSU_FCM).
TSU FIFO Overflow Prevention Function: By supporting relay operations, the MAC controller
needs to transmit relay frames other than transmit frames requested by the E-DMAC normally.
Arbitration is carried out between these two frames. The procedure of arbitration is specified by
registers TSU_PRISL0 and TSU_PRISL1. It has a function which relays frames of the TSU FIFO
with priority when the using rate of the TSU FIFO exceeds the value set by registers
TSU_PRISL0 and TSU_PRISL1, thus preventing frame losses by TSU FIFO overflow.
QoS (IEEE802.1Q) Frame Transmit/Receive, Relay Function: QoS frames can be transmitted
and received. At the using relay function, if the Ethernet device connected to one of the MAC
controllers cannot transmit/receive QoS frames, this LSI can convert to the normal IEEE802.3
frames and relay it.
Figure 18.2 shows the data path and outline of various settings.
Rev. 1.00 Dec. 27, 2005 Page 706 of 932
REJ09B0269-0100
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