HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 335

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

• Register specifications
Break Condition Specified for I Bus Data Access Cycle:
• Register specifications
BARA = H'01000000, BAMRA = H'00000000, BBRA = H'0066, BARB = H'0000F000,
BAMRB = H'FFFF0000, BBRB = H'036A, BDRB = H'00004567, BDMRB = H'00000000,
BRCR = H'00300080
Specified conditions: Channel A/channel B independent mode
<Channel A>
Address:
Bus cycle: L bus/data access/read/word
The ASID check is not included.
<Channel B>
Y Address: H'0000F000, Address mask: H'FFFF0000
Data:
Bus cycle: Y bus/data access/write/word
The ASID check is not included.
On channel A, a user break occurs during word read from address H'01000000 in the memory
space. On channel B, a user break occurs when word data H'4567 is written in address
H'0000F000 in the Y memory space. The X/Y-memory space is changed by a mode setting.
BARA = H'00314156, BAMRA = H'00000000, BBRA = H'0094, BARB = H'00055555,
BAMRB = H'00000000, BBRB = H'00A9, BDRB = H'00007878, BDMRB = H'00000F0F,
BRCR = H'00000080, BASRA = H'80, BASRB = H'70
Specified conditions: Channel A/channel B independent mode
<Channel A>
Address:
Bus cycle: I bus/instruction fetch/read (operand size is not included in the condition)
<Channel B>
Address:
Data:
Bus cycle: I bus/data access/write/byte
On channel A, a user break occurs when instruction fetch is performed for ASID = H’80 and
address H'00314156 in the memory space.
On channel B, a user break occurs when ASID = H’70 and byte data H'7* is written in address
H'00055555 on the I bus.
H'01000000, Address mask: H'00000000
H'00004567, Data mask: H'00000000
H'00314156, Address mask: H'00000000, ASID = H'80
H'00055555, Address mask: H'00000000, ASID = H'70
H'00000078, Data mask: H'0000000F
Rev. 1.00 Dec. 27, 2005 Page 291 of 932
Section 9 User Break Controller
REJ09B0269-0100