HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 621

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Serial Data Reception: Figures 16.15 and 16.16 show sample flowcharts for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
To change the operating mode from asynchronous mode to clock synchronous mode without
initialization, be sure to confirm that the flags ORER, PER3 to PER0, and FER3 to FER0 are
cleared to 0.
No
No
and clear RDF flag in SCFSR to 0
Read receive data from SCFRDR
Clear RE bit in SCSCR to 0
Read ORER flag in SCLSR
Read RDF flag in SCFSR
All data received?
Start reception
End reception
Initialization
ORER = 1?
RDF = 1?
Figure 16.15 Sample Serial Reception Flowchart
Yes
Yes
No
Error handling
Yes
Section 16 Serial Communication Interface with FIFO (SCIF)
1.
2.
3.
4.
SCIF initialization: See figure 16.3, Sample
SCIF Initialization Flowchart.
Receive error handling: If a receive error
occurs, read the ORER flag in SCLSR, then
after executing the necessary error handling,
clear the ORER flag to 0.
Serial reception cannot be continued while the
ORER flag is set to 1.
SCIF status check and receive data read:
Read SCFSR, check that the RDF flag is set
to 1, then read receive data in SCFRDR and
clear the RDF flag to 0. Notification that the
RDF flag has changed from 0 to 1 can also
be given by the RXI.
Serial reception continuation procedure:
To continue serial reception, read at least the
receive trigger set number of data bytes from
SCFRDR, read 1 from the RDF flag, and then
clear the RDF flag to 0. The number of receive
data in SCFRDR can be ascertained by reading
the lower bits of SCFDR. However, if the DMAC
is activated by the RXI and the value is read from
SCFRDR, the RDF flag is cleared automatically.
Rev. 1.00 Dec. 27, 2005 Page 577 of 932
REJ09B0269-0100

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