HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 145
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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address (ME), respectively. The LDC and STC instructions are extended for MOD register
handling.
If the DMX bit of the SR register is set, the modulo addressing is specified for the X address
register. If the DMY bit of the SR register is set, the modulo addressing is specified for the Y
address register. Modulo addressing is valid for either the X or the Y address register, only; it
cannot be set for both at the same time. Therefore, DMX and DMY cannot both be set
simultaneously (if they are, the DMY setting will be valid). ( In the future, this specification may
be changed.) The DMX and DMY bits of the SR can be specified by the STC or LDC instruction
for the SR register.
If an exception is accepted during modulo addressing, the DMX and DMY bits of the SR and
MOD register must be saved. By restoring these register values, a control is returned to the
modulo addressing after an exception handling.
Table 3.11 Modulo Addressing Control Instructions
Instruction
STC MOD, Rn
STC.L
LDC @Rn+, MOD
LDC Rn, MOD
MOD, @−Rn
Operation
MOD → Rn
Rn – 4 → Rn, MOD → (Rn)
(Rn) → MOD, Rn + 4 → Rn
Rn → MOD
Rev. 1.00 Dec. 27, 2005 Page 101 of 1044
Section 3 DSP Operating Unit
Execution States
1
1
4
4
REJ09B0269-0100
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