HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 676
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 17 Serial I/O with FIFO (SIOF)
16-bit Stereo Data (1): L/R method, rising edge sampling, slot No.0 used for left channel data,
slot No.1 used for right channel data, frame length = 32 bits
16-bit Stereo Data (2): L/R method, rising edge sampling, slot No.0 used for left channel transmit
data, slot No.1 used for left channel receive data, slot No.2 used for right channel transmit data,
slot No.3 used for right channel receive data, frame length = 64 bits
Rev. 1.00 Dec. 27, 2005 Page 632 of 932
REJ09B0269-0100
RXD_SIO
SCK_SIO
SIOFSYNC
TXD_SIO
RXD_SIO
SCK_SIO
SIOFSYNC
TXD_SIO
Figure 17.15 Transmission and Reception Timings (16-Bit Monaural Data (1))
Figure 17.16 Transmission and Reception Timings (16-Bit Stereo Data (1))
Setting:
Setting:
TRMD = 00 or 10,
TDLE = 1,
RDLE = 1,
CD0E = 0,
No bit delay
No bit delay
Lch.DATA
Slot No.0
TRMD = 11,
TDLE = 1,
RDLE = 1,
CD0E = 0,
Lch.DATA
Slot No.0
REDG = 0,
TDLA3 to TDLA0 = 0000,
RDLA3 to RDLA0 = 0000,
CD0A3 to CD0A0 = 0000,
REDG = 1,
TDLA3 to TDLA0 = 0000,
RDLA3 to RDLA0 = 0000,
CD0A3 to CD0A0 = 0000,
Slot No.1
1 frame
1 frame
FL = 1101 (frame length: 64 bits)
TDRE = 0,
RDRE = 0,
CD1E = 0,
FL = 1100 (frame length: 32 bits)
TDRE = 1,
RDRE = 1,
CD1E = 0,
Slot No.2
TDRA3 to TDRA0 = 0000,
RDRA3 to RDRA0 = 0000,
CD1A3 to CD1A0 = 0000
TDRA3 to TDRA0 = 0001,
RDRA3 to RDRA0 = 0001,
CD1A3 to CD1A0 = 0000
Rch.DATA
Slot No.1
Slot No.3
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