HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 495

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

If the PCMCIA card is accessed as an I/O card in little endian mode, dynamic bus sizing for the
I/O bus can be achieved using the IOIS16 signal. If the IOIS16 signal is brought high in a word-
size I/O bus cycle while the bus width of area 6 is specified as 16 bits, the bus width is recognized
as 8 bits and data is accessed twice in 8-bit units in the I/O bus cycle to be executed.
The IOIS16 signal is sampled at the falling edge of CKIO in the Tpci0, Tpci0w, and Tpci1 cycles
when the TED[3:0] bits are specified as 1.5 cycles or more, and is reflected in the CE2 signal 1.5
cycles after the CKIO sampling point. The TED[3:0] bits must be specified appropriately to satisfy
the setup time from ICIORD and ICIOWR of the PC card to CEn.
Figure 12.44 shows the dynamic bus sizing basic timing.
Note that the IOIS16 signal is not supported in big endian mode. In the big endian mode, the
IOIS16 signal must be fixed low.
Read
Write
A25 to A0
D15 to D0
D15 to D0
ICIOWR
RD/WR
ICIORD
Figure 12.42 Basic Timing for PCMCIA I/O Card Interface
CExx
CKIO
BS
Tpci1
Tpci1w
Tpci1w
Rev. 1.00 Dec. 27, 2005 Page 451 of 932
Section 12 Bus State Controller (BSC)
Tpci1w
Tpci2
REJ09B0269-0100