HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 310

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 9 User Break Controller
9.2
The user break controller has the following registers. For details on register addresses and access
sizes, refer to section 23, List of Registers.
• Break address register A (BARA)
• Break address mask register A (BAMRA)
• Break bus cycle register A (BBRA)
• Break address register B (BARB)
• Break address mask register B (BAMRB)
• Break bus cycle register B (BBRB)
• Break data register B (BDRB)
• Break data mask register B (BDMRB)
• Break control register (BRCR)
• Execution times break register (BETR)
• Branch source register (BRSR)
• Branch destination register (BRDR)
• Break ASID register A (BASRA)
• Break ASID register B (BASRB)
9.2.1
BARA is a 32-bit readable/writable register. BARA specifies the address used as a break condition
in channel A.
Rev. 1.00 Dec. 27, 2005 Page 266 of 932
REJ09B0269-0100
Bit
31 to 0
Register Descriptions
Break Address Register A (BARA)
Bit Name
BAA31 to
BAA 0
Initial
Value
All 0
R/W
R/W
Description
Break Address A
Store the address on the LAB or IAB specifying break
conditions of channel A.