HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 637

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

17.3.2
SISCR is used to set the baud rate generator operation. SISCR can be specified when the TRMD1
and TRMD0 bits in SIMDR are specified as B′10 or B′11. SISCR is initialized by a power-on
reset or software reset.
Bit
4 to 0
Bit
15
14
13
12
11
10
9
8
7 to 3
Bit Name

Bit Name
MSSEL
MSIMM
—
BRPS4
BRPS3
BRPS2
BRPS1
BRPS0
—
Serial Clock Select Register (SISCR)
Initial
Value
All 0
Initial
Value R/W
1
1
0
0
0
0
0
0
All 0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R
R/W
R
Description
Master Clock Source Selection
The master clock is the clock input to the baud rate
generator.
0: Uses the SIOMCLK pin input signal as the master clock
1: Uses PCLK as the master clock
Master Clock Direct Selection
0: Uses the baud rate generator output clock as the clock
1: Uses the master clock itself as the clock source
Reserved
This bit is always read as 0. The write value should always
be 0.
Baud Rate Generator’s Prescalar Setting (BRPS)
Set the master clock division ratio BRPS.
00000: (× 1/32)
00001: (× 1/1)
00010: (× 1/2)
11111: (× 1/31)
Reserved
These bits are always read as 0. The write value should
always be 0.
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
source
Rev. 1.00 Dec. 27, 2005 Page 593 of 932
Section 17 Serial I/O with FIFO (SIOF)
REJ09B0269-0100