HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 629
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 16 Serial Communication Interface with FIFO (SCIF)
From equation (1), if F = 0 and D = 0.5, the receive margin is 46.875%, as given by equation (2).
When D = 0.5 and F = 0:
M = (0.5 – 1/(2 × 16)) × 100% = 46.875% ........................................... (2)
This is a theoretical value. A reasonable margin to allow in system designs is 20% to 30%.
Notes on DMAC Usage: To use an external clock source for a synchronous clock, the external
clock should be input after SCFTDR has been updated by the DMAC and then five cycles or more
of a peripheral operating clock has passed. If a transmit clock is input within four cycles after
SCFTDR has updated, erroneous operation may occur (figure 16.20).
SCIFnCK
t
TDFE
TxD
D0
D1
D2
D3
D4
D5
D6
D7
Note: To operate on an external clock, specify t as 4 cycles or more of a peripheral operating clock.
Figure 16.20 Sample Transfer of Synchronous Clock by DMAC
Rev. 1.00 Dec. 27, 2005 Page 585 of 932
REJ09B0269-0100
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