HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 620
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 620 of 980
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Section 16 Serial Communication Interface with FIFO (SCIF)
2. When data is transferred from SCFTDR to SCTSR and transmission is started, consecutive
3. The SCIF checks the SCFTDR transmit data at the timing for sending the last bit. If data is
4. After serial transmission has completed, the SCIFnCK pin is fixed to high.
Figure 16.14 shows an example of the SCIF transmit operation.
Rev. 1.00 Dec. 27, 2005 Page 576 of 932
REJ09B0269-0100
Serial
clock
Serial
data
TDFE
TEND
transmit operations are performed until there is no transmit data left in SCFTDR. When the
number of transmit data bytes in SCFTDR falls to or below the transmit trigger number set in
SCFCR, the TDFE flag is set. If the TIE bit in SCSCR is set to 1 at this time, a transmit-FIFO-
data-empty interrupt (TXI) request is generated. If and external clock is specified, the SCIF
outputs data in synchronization with the input clock. Serial transmit data is output in order
from LSB to MSB from the TxD pin.
present, the data is transferred from SCFTDR to SCTSR, the stop bit is sent, and then serial
transmission of the next frame is started.
If there is no transmit data, the TEND flag in SCFSR is set to 1, the stop bit is sent, and then
the state of the TxD pin is held.
request
TXI
TXI handling routine writes
data in SCFTDR and clears
the TDFE flag to 0
Figure 16.14 Example of the SCIF Transmit Operation
Bit 0
LSB
Bit 1
1 frame
request
TXI
Bit 7
MSB
Bit 0
Bit 1
Bit 6
Bit 7
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