HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 237

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5.3
5.3.1
The TLB caches address translation table information located in the external memory. The address
translation table stores the logical page number and the corresponding physical number, the
address space identifier, and the control information for the page, which is the unit of address
translation. Figure 5.6 shows the overall TLB configuration. The TLB is 4-way set associative
with 128 entries. There are 32 entries for each way. Figure 5.7 shows the configuration of virtual
addresses and TLB entries.
Bit
0
Entry 0
Entry 1
Entry 31
TLB Functions
Configuration of the TLB
Bit Name
AT
VPN(31-17)
Figure 5.6 Overall Configuration of the TLB
Initial
Value
0
Address Array
VPN(11-10)
Way 0 to 3
R/W
R/W
ASID(7-0)
Description
Address translation
Enables/disables the MMU.
0: MMU disabled
1: MMU enabled
V
Entry 0
Entry 1
Entry 31
Section 5 Memory Management Unit (MMU)
Rev. 1.00 Dec. 27, 2005 Page 193 of 932
PPN(28-10) PR(1-0) SZ C D SH
Data Array
Way 0 to 3
REJ09B0269-0100