HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 117
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 117 of 980
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3.2
3.2.1
The CPU processing modes can be extended using the mode bit (MD) and DSP bit (DSP) of the
status register (SR), as shown below.
As shown above, the extension of the DSP function by the DSP bit can be specified independently
of the control by the MD bit. Note, however, that the DSP bit can be modified only in privileged
mode. Before the DSP bit is modified, a transition to privileged mode or privileged DSP mode is
necessary.
3.2.2
In DSP mode, a part of the P2 area in the logical address space can be accessed in user DSP mode.
When this area is accessed in user DSP mode, this area is referred to as a Uxy area. X/Y memory
is then assigned to this Uxy area. Accordingly, X/Y memory can also be accessed in user DSP
mode.
Table 3.1
MD
0
0
1
1
Address Range
H'A5000000 to
H'A5FFFFFF
DSP
0
1
0
1
DSP Mode Resources
Processing Modes
DSP Mode Memory Map
Logical Address Space
Privileged DSP mode Allowed
Processing Mode
User mode
User DSP mode
Privileged mode
P2/Uxy
Name
Privileged or DSP
Protection
Access of Resources
Protected in Privileged Mode
or Privileged Instruction
Execution
Prohibited
Prohibited
Allowed
16-Mbyte physical address space, non-
cacheable, non-address translatable
Can be accessed in privileged mode,
privileged DSP mode, and user DSP mode
Description
Rev. 1.00 Dec. 27, 2005 Page 73 of 1044
Description
Section 3 DSP Operating Unit
DSP Extended
Functions
Invalid
Valid
Invalid
Valid
REJ09B0269-0100
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