HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 257
![MPU 1.5/3.3V 0K PB-FREE 256-BGA](/photos/28/61/286175/256-lfbga_sml.jpg)
HD6417712BPV
Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet
1.HD6417712BPV.pdf
(980 pages)
Specifications of HD6417712BPV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 257 of 980
- Download datasheet (6Mb)
5.6.3
Invalidating Specific Entries: Specific TLB entries can be invalidated by writing 0 to the entry’s
V bit. R0 specifies the write data and R1 specifies the address.
Reading the Data of a Specific Entry: This example reads the data section of a specific TLB
entry. The bit order indicated in the data field in figure 5.14 (2) is read. R0 specifies the address
and the data section of a selected entry is read to R1.
5.7
The following operations should be performed in the P1 or P2 areas. In addition, when the P0, P3,
or U0 areas are accessed consecutively (this access includes instruction fetching), the instruction
code should be placed at least two instructions after the instruction that executes the following
operations.
1. Modification of SR.MD or SR.BL
2. Execution of the LDTLB instruction
3. Write to the memory-mapped TLB
4. Modification of MMUCR
5. Modification of PTEH.ASID
; R0=H'1547 381C
; MMUCR.IX=0
; the V bit of way 0 of the entry selected by the VPN(16–12)=B'1 0011
; index is cleared to0,achieving invalidation.
MOV.L
; R0=H'F300 4300
; MOV.L @R0,R1
Usage Examples
Usage Note
R0,@R1
R1=H'F201 3000
VPN(16-12)=B'00100
Way 3
Section 5 Memory Management Unit (MMU)
Rev. 1.00 Dec. 27, 2005 Page 213 of 932
REJ09B0269-0100
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