HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 474

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 Bus State Controller (BSC)
2. Self-refreshing
Rev. 1.00 Dec. 27, 2005 Page 430 of 932
REJ09B0269-0100
Self-refresh mode in which the refresh timing and refresh addresses are generated within the
synchronous DRAM. Self-refreshing is activated by setting both the RMODE bit and the
RFSH bit in SDCR to 1. After starting the self-refreshing, PALL command is issued in Tp
cycle after the completion of the pre-charging bank. A SELF command is then issued after
inserting idle cycles of which number is specified by the TRP[1:0] bits in CSnWSR.
Synchronous DRAM cannot be accessed while in the self-refresh state. Self-refresh mode is
cleared by clearing the RMODE bit to 0. After self-refresh mode has been cleared, command
issuance is disabled for the number of cycles specified by the TRC[1:0] bits in CSnWCR.
A12/A11*
A25 to A0
D31 to D0
DACKn*
RD/WR
DQMxx
CKIO
RAS
CAS
CSn
BS
1
2
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
Figure 12.25 Auto-Refresh Timing
Tp
2. The waveform for DACKn is when active low is specified.
Tpw
Trr
Hi-z
Trc
Trc
Trc

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