ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 952

• Manufacturer Part Number: ATSAM3U4CA-CU
• Description: IC MCU 32BIT 256KB FLSH 100TFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 57
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 52K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b, 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 52 KB
• Interface Type: 3xUSART, TWI, 4xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 57
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

39.6.7
39.6.8
39.6.8.1
952
952
SAM3U Series
SAM3U Series
Transfer Without DMA
Handling Transactions with USB V2.0 Device Peripheral
Setup Transaction
Important. If the DMA is not to be used, it is necessary that it be disabled because otherwise it
can be enabled by previous versions of software without warning. If this should occur, the DMA
can process data before an interrupt without knowledge of the user.
The recommended means to disable DMA is as follows:
The setup packet is valid in the DPR while RX_SETUP is set. Once RX_SETUP is cleared by
the application, the UDPHS accepts the next packets sent over the device endpoint.
When a valid setup packet is accepted by the UDPHS:
An endpoint interrupt is generated while RX_SETUP in the UDPHS_EPTSTAx register is not
cleared. This interrupt is carried out to the microcontroller if interrupts are enabled for this
endpoint.
• the UDPHS device automatically acknowledges the setup packet (sends an ACK response)
• payload data is written in the endpoint
• sets the RX_SETUP interrupt
• the BYTE_COUNT field in the UDPHS_EPTSTAx register is updated
// Reset IP UDPHS
// With OR without DMA !!!
AT91C_UDPHS_DMA_CHANNEL_NBR)>>4); i++ ) {
// RESET endpoint canal DMA:
command
// Disable endpoint
// Reset endpoint config
// Reset DMA channel (Buff count and Control field)
STOP command
// Reset DMA channel 0 (STOP)
command
// Clear DMA channel status (read the register for clear it)
AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMASTATUS;
}
AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_EN_UDPHS;
AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_EN_UDPHS;
for( i=1; i<=((AT91C_BASE_UDPHS->UDPHS_IPFEATURES &
// DMA stop channel command
AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0;
AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCTLDIS |= 0XFFFFFFFF;
AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCTLCFG = 0;
AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0x02;
AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0;
AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMASTATUS =
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
// STOP
// STOP
// NON