ATSAM3U4CA-CU Atmel, ATSAM3U4CA-CU Datasheet - Page 357

IC MCU 32BIT 256KB FLSH 100TFBGA

ATSAM3U4CA-CU

Manufacturer Part Number
ATSAM3U4CA-CU
Description
IC MCU 32BIT 256KB FLSH 100TFBGA
Manufacturer
Atmel
Series
SAM3Ur
Datasheets

Specifications of ATSAM3U4CA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U4CA-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3U4CA-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
25.7.3
25.8
Figure 25-3. Memory Connections for External Devices
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
External Memory Mapping
Interrupt
SMC
NCS[0] - NCS[3]
The SMC has an interrupt line connected to the Nested Vector Interrupt Controller (NVIC). Han-
dling the SMC interrupt requires programming the NVIC before configuring the SMC.
Table 25-3.
Table 25-4.
Note:
The SMC provides up to 24 address lines, A[23:0]. This allows each chip select line to address
up to 16 Mbytes of memory.
If the physical memory device connected on one chip select is smaller than 16 Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
A[23:0] is only significant for 8-bit memory, A[23:1] is used for 16-bit memory.
0x60000000-0x60FFFFFF
0x61000000-0x61FFFFFF
0x62000000-0x62FFFFFF
0x63000000-0x63FFFFFF
0x04000000-0x07FFFFFF
0x68000000-0x6FFFFFFF
Address
D[15:0]
A[23:0]
Instance
NWE
NRD
SMC
1. See
Peripheral IDs
External Memory Mapping
Section 25.16.2 ”NFC Control
ID
9
Use
Chip Select 0 (16 MB)
Chip Select 1
Chip Select 2
Chip Select 3
Undefined Area
NFC Command Registers
Registers”, i.e., CMD_ADDR description.
8 or 16
NCS0
NCS1
Figure
NCS2
Memory Enable
Output Enable
Write Enable
A[25:0]
D[15:0] or D[7:0]
NCS3
(1)
Memory Enable
).
Memory Enable
Memory Enable
SAM3U Series
SAM3U Series
Access
Read-write
Read-write
Read-write
Read-write
Read-write
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